1. Field of Invention
The present invention relates to a semiconductor structure and a manufacturing method thereof, and more generally to dual isolation structures or dual trenches having different depths and a manufacturing method thereof.
2. Description of Related Art
Due to the rapid development of integrated circuit technologies, device miniaturization and integration become the major trends in the semiconductor manufacturing industry. As the dimension of a device continues to shrink and the level of integration continues to increase, a structure for isolating devices is required to reduce accordingly. Hence, with device miniaturization, isolation structures are increasingly difficult to fabricate.
Because a shallow trench isolation (STI) structure is scalable without causing any bird's beak encroachment problem as in the conventional local oxidation of silicon (LOCOS) process, it is the preferred isolation technique for a sub-micron (or smaller dimension) metal-oxide-semiconductor fabrication process.
In addition, the required depths of isolation structures are varied according to different applications for a periphery area and an array area in a memory device. Generally speaking, the depth of a STI structure in the periphery area is much greater than that in the array area. Therefore, at least two photolithography processes are required to fabricate such dual isolation structures having different depths, so that the process is complicated and the cost is high.